Appeal No. 1996-0455
Application No. 07/511,778
The disclosed invention relates to a graphics processing
method and apparatus, and to a microprocessor for executing
instructions.
Claims 1 and 11 are illustrative of the claimed
invention, and they read as follows:
1. A graphics processing apparatus comprising:
a CPU and a system memory, each connected to
a system bus composed of address, data and control buses;
a local memory and a frame memory, each connected to
a local bus composed of address, data and control buses;
and
a graphics processing processor having a first port
connected to said system bus, and a second port connected
to said local bus, said graphics processing processor having
means for simultaneously accessing said system memory and
said local or frame memory via said first and second
ports, respectively by simultaneously issuing two separate
addresses on respective address buses of said first
and second ports.
11. A microprocessor for executing instructions each
having a fixed length, comprising:
first instruction holding means for holding a primary
instruction read from a program;
second instruction holding means for holding a sub-
instruction accompanying said primary instruction; and
decoding means for decoding said primary instruction
and said sub-instruction, whereby when said primary
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