Ex parte ASANO et al. - Page 6




          Appeal No. 1996-2197                                                        
          Application 08/150,548                                                      


          In re McLaughlin, 443 F.2d 1392, 1395, 170 USPQ 209, 212 (CCPA              
          1971).                                                                      
               Appellants argue (Brief, pages 3 to 5) that their                      
          admitted prior art Figures 17 to 23 fail to teach or suggest                
          assigning non-contiguous frame regions to each unit processor,              
          and instead assigns contiguous regions to each processor.  We               
          agree, and we note that the examiner admits that the admitted               
          prior art "does not expressly state the assigned regions are                
          non-contiguous" (Answer, page 3).                                           
               As described in their specification, appellants’ Figure                
          17 shows a unit processor (CPU 171) which instructs plural                  
          processing units (173a-h) to "transfer data sequentially"                   
          (specification, page 2), such that the input data is                        
          transfered "for the regions assigned thereto" (specification,               
          page 2).  Once the processing units (173a-h) have completed                 
          processing for the assigned regions, the unit processor                     
          instructs the processing units to start processing "for the                 
          subsequent regions" (specification, page 3).  In addition,                  
          processing of fetched input data must be completed before                   
          "subsequent" data can be fetched (see specification, page 6).               
          Thus, the contiguous and sequential nature of conventional                  
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