Ex parte MINATO - Page 3




          Appeal No. 1997-1757                                                        
          Application No. 08/450,145                                                  

               Turning first to the rejection under 35 U.S.C. § 112,                  
          first paragraph, the examiner contends that there is no                     
          support for the “carrier lifetime in said semiconductor layer               
          is different between substantially all of said current path                 
          portion...and a remaining portion of said semiconductor layer”              
          recited in claims 5, 7 and 8.  The examiner’s rationale is                  
          based on appellant’s election of the insulated gate bipolar                 
          transistor in Paper No. 9, such transistor being depicted in                
          Figures 15A, 15B and 15C, rather than the thyristor depicted                
          in Figures 3 and 7.  Whereas Figures 3 and 7 depict, and                    
          recitations in the specification regarding these figures                    
          describe, the claimed “different” carrier lifetime, Figures                 
          15A, 15B and 15C do not clearly depict the current path                     
          portion, the path for most of the main current and the                      
          remaining portion of the semiconductor and there is no                      
          discussion regarding these elements with regard to Figures                  
          15A, 15B and 15C.                                                           
               We will not sustain this rejection since we agree with                 
          appellant that Figures 3 and 7, and their attendant                         
          description in the specification, which do, indeed, have                    
          support for the allegedly objectionable claim language,                     

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