Appeal No. 1998-0733
Application 08/489,867
Claims 1-3 and 5 stand rejected under 35 U.S.C. § 102(b)
as being anticipated by Mogi.
Claims 4 and 6-8 stand rejected under 35 U.S.C. § 103 as
being unpatentable over Mogi.
We refer to the Final Rejection (Paper No. 12) and the
Examiner's Answer (Paper No. 15) (pages referred to as "EA__")
for a statement of the Examiner's position and to the Appeal
Brief (Paper No. 14) for a statement of Appellants' arguments
thereagainst.
OPINION
The claims are grouped to stand or fall together.
Mogi includes a plurality of circuits 4-9 that are
controlled by a central processing unit (CPU) 1 via two-wire
bus 2. Appellants argue that these processing means are
constituted by a plurality of processing circuits, each having
its own processing power, instead of a single processing unit
executing control programs as claimed. Appellants note that
special circuits are what the subject invention seeks to
avoid.
The Examiner characterizes the circuits 4-9 in Mogi as a
plurality of operations that are controlled by the CPU 1 and
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