Ex parte SHINOHARA - Page 2




          Appeal No. 1998-1097                                                        
          Application No. 08/557,484                                                  

               The claimed invention relates to a circuit arrangement                 
          for reducing noise and eliminating cross-talk in a                          
          semiconductor integrated circuit which includes a MIS (metal-               
          insulator silicon) capacitor.  First and second capacitors are              
          connected in series between a substrate terminal and the MIS                
          capacitor, with a power supply connected between the first and              
          second capacitors.  The power supply acts to control the                    
          potential between the first and second capacitors to prevent a              
          digital signal transmitted to the substrate from entering a                 
          separate circuit connected with the MIS capacitor.                          
               Claim 1 is illustrative of the invention and reads as                  
          follows:                                                                    
               1. A semiconductor circuit comprising:                                 
               a substrate terminal;                                                  
               a first capacitor connected to said substrate terminal;                
               a second capacitor connected in series to said first                   
          capacitor;                                                                  
               an MIS capacitor connected in series to said second                    
          capacitor;                                                                  
               a connector terminal connected between said first                      
          capacitor and said second capacitor; and                                    
               a reference potential-generating source for controlling                
          said connector terminal to an arbitrary potential connected to              
          the connector terminal.                                                     
                                          2                                           





Page:  Previous  1  2  3  4  5  6  7  8  9  10  11  12  13  Next 

Last modified: November 3, 2007