Ex parte MORRIS et al. - Page 2




                     Appeal No. 1998-1113                                                                                                                                              
                     Application 08/533,878                                                                                                                                            


                                The invention relates to a way of protecting store                                                                                                     
                     operations without affecting load operations and to protection                                                                                                    
                     of load operations without affecting store operations.  The                                                                                                       
                     functions are performed without requiring additional CPU time.                                                                                                    
                     This goal is accomplished by providing an ordered store                                                                                                           
                     instruction which prevents the CPU from performing its ordered                                                                                                    
                     store operation until preceding store operations are                                                                                                              
                     completed.  In addition, an ordered load instruction prevents                                                                                                     
                     the CPU from performing subsequent load operations until its                                                                                                      
                     ordered load operation is completed.                                          1                                                                                   
                                Independent claims 1, 4 and 7 are as follows:                                                                                                          
                                1.  A method of ordering load operations performed by a                                                                                                
                     CPU executing a stream of instructions, wherein the stream of                                                                                                     
                     instructions are in a program order and include load                                                                                                              
                     instructions and store instructions, and the load instructions                                                                                                    
                     each perform a load operation, the method comprising:                                                                                                             
                                detecting an ordered load instruction in the stream of                                                                                                 
                     instructions;                                                                                                                                                     
                                preventing the CPU from executing a load instruction                                                                                                   
                     subsequent in the program order to the ordered load                                                                                                               
                     instruction prior to the load operation requested by the                                                                                                          
                     ordered load instruction being completed by the CPU; and                                                                                                          
                                allowing the CPU to not execute a load instruction                                                                                                     
                     preceding in the program order the ordered load instruction                                                                                                       

                                1See pages 4-5 and 11-12 of the specification.                                                                                                         
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