Appeal No. 1998-2710
Application 08/582,045
second error current that cancels a first error current due to
cross-connection of the second circuit with respect to the
first circuit." The Examiner in his response to the brief,
answer at pages 5-7, does not identify what he considers as
the two claimed nodes in Funada's Figure 1. The Examiner also
does not explain how he contemplates the connecting of the
capacitors "C's" in Figure 5 of Lee to the unidentified nodes
of Funada to reach the claimed capacitive connections.
Furthermore, the Examiner merely asserts, answer at pages 6
and 7, that "the second error current generated in the second
pair of transistors (3-4) in the Funada reference 'inherently'
cancels the first error current generated in the first pair of
transistors because the second pair of transistors (3-4) are
cross-coupled to the first pair of transistors (1-2)." For
something to occur "inherently" in a prescribed manner, it
necessarily must occur in the prescribed manner. The Examiner
has not so shown in the suggested combination of Funada and
Lee. We do not agree with the Examiner's position.
Therefore, we do not sustain the obviousness rejection of
claim 1 and its grouped claims 3-6, 9, 10, 12-15, and 25 over
Funada and Lee.
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