Appeal No. 1998-3036
Application No. 08/404,920
voltage connected to a first group of transistors and on a second control line, the appellant
has an analog or digital control voltage connected to a second group of transistors. Based
upon appellant’s disclosure, it is clear what the appellant is claiming. The mere fact that
the disclosure (specification, page 13) states that either analog or digital control voltages
may be used does not mean that appellant is required to recite both alternatives in the
claims. The indefiniteness rejection is reversed.
35 U.S.C. §103(a) Obviousness Rejection
According to the examiner (Answer, page 6), “[t]he fact that appellant claims an
analog control voltage does not distinguish over the teachings of Dunlop et al[.] because
the control voltage applied to the gates of the FETs 24 in this reference is the same as in
appellant’s invention, i.e., a fixed predetermined level voltage. Since the terminology
‘analog voltage’ is not clear (note the indefiniteness rejection above), this language does
not define over Dunlop et al’s teachings.” We cannot sustain the 35 U.S.C.§103(a)
rejection. As indicated supra, the examiner erroneously relied upon the 35 U.S.C. §112
rejection to address the appellant’s “analog voltage” claim limitation. The 35 U.S.C. §112
rejection was not proper and, therefore, cannot be relied upon in the context of the
examiner’s obviousness rejection.
Finally, Dunlop does not disclose the use of an analog voltage. Although the
examiner was correct in his assertion that Dunlop addresses the same problem as the
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