Appeal No. 1999-0168
Application No. 08/540,349
c) saving the context of the current operating state of
said CPU, and
d) enabling said coprocessor to service the interrupt by
loading a status register with operating mode and interrupt
enabling bits.
The Examiner relies on the following prior art:
Cutler et al. (Cutler) 5,148,544 Sep. 15,
1992
Edgington et al. (Edgington) 5,530,804 Jun.
25, 1996
(filed May 16, 1994)
Claims 1-16 stand finally rejected under 35 U.S.C. § 103.
As evidence of obviousness, the Examiner offers Cutler alone
with respect to claims 1, 2, 6-9, 14, and 15, and adds
Edgington to Cutler with respect to claims 3-5, 10-13, and 16.
Rather than reiterate the arguments of Appellants and the
Examiner, reference is made to the Brief (Paper No. 11) and
Answer (Paper No. 12) for the respective details.
OPINION
We have carefully considered the subject matter on
appeal, the rejection advanced by the Examiner, the arguments
in support of the rejection and the evidence of obviousness
relied upon by the Examiner as support for the rejection. We
have, likewise, reviewed and taken into consideration, in
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