Appeal No. 1999-1797
Application No. 08/635,197
rationale on pages 6 and 7 of the Answer purports to explain why the limitations of claim 1
are rendered obvious by the teachings of the prior art article. Again, however, we are in
substantial agreement with appellant’s position, as stated in the Reply Brief, that the
rejection appears to advance in the wrong direction. Instead of showing how the teachings
of Ramachandran would have led the artisan to the subject matter of instant claim 1, the
rejection appears to use the teachings to show that the artisan would have recognized the
advantages of a system such as that presently claimed.
The reference, at pages 1458 and 1459, describes use of software to study the
variations of circuit delay with respect to various possible layout configurations. The
phrase “extracting the difference” refers to finding the difference between two paths, with a
“100% difference” representing completely different critical paths. In our view the
reference fails to teach or suggest the specific requirements of claim 1.
The allocation of burdens requires that the USPTO produce the factual basis for its
rejection of an application under 35 U.S.C. § § 102 and 103. In re Piasecki, 745 F.2d
1468, 1472, 223 USPQ 785, 788 (Fed. Cir. 1984) (citing In re Warner, 379 F.2d 1011,
1016, 154 USPQ 173, 177 (CCPA 1967)). The one who bears the initial burden of
presenting a prima facie case of unpatentability is the examiner. In re Oetiker, 977 F.2d
1443, 1445, 24 USPQ2d 1443, 1444 (Fed. Cir. 1992). Since the examiner has not
convincingly explained where the suggestion for the proposed modification of
Ramachandran lies, and we do not find any suggestion for the modification in the evidence
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