Appeal No. 1999-2574
Application No. 08/728,878
particular, by minimizing lead overlap, via bus width
reduction, the probability of interlevel oxide failures is
reduced.
Representative claim 4 is reproduced as follows:
4. An apparatus comprising:
a circuit board having at least a first metal layer and
a second metal layer, each said metal layer separated by an
insulating layer;
said second metal layer overlapping said first metal
layer in at least one region;
wherein said second metal layer has a monotonically
decreasing width.
The examiner relies on the following reference:
Doshita 5,251,108 Oct. 5, 1993
Claims 4 and 5 stand rejected under 35 U.S.C. 112, first
paragraph, based on an inadequate written description and a
nonenabling disclosure.
Claims 4 and 5 stand further rejected under 35 U.S.C.
102(b) as anticipated by Doshita.
Reference is made to the brief and answer for the
2–
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