Appeal No. 2002-0818
Application No. 09/075,854
depositing a gap fill oxide layer over the interconnect
features and substrate wherein an oxide layer having angled
facets are formed above the interconnect features;
depositing a sacrificial layer over the gap fill oxide layer
utilizing process parameters that provide an etch to deposition
ratio which substantially etches away the angled facets of the
oxide layer; and
etching the layers to provide a substantially planar layer
on said semiconductor substrate.
The examiner relies upon the following references as
evidence of obviousness:
Nariani et al. (Nariani) 5,128,279 Jul. 7, 1992
Jain (Jain '854) 5,494,854 Feb. 27, 1996
Jain et al. (Jain '056) 5,602,056 Feb. 11, 1997
Wang et al. (Wang '606) 5,679,606 Oct. 21, 1997
Wang (Wang '631) 5,728,631 Mar. 17, 1998
Stanley Wolf Ph.D. & Richard N. Tauber Ph.D. (Wolf), Silicon
Processing for the VLSI ERA, Vol. 1: Process Technology 546
(Lattice Press, Sunset Beach, CA 1986)
Appellants' claimed invention is directed to a method of
forming a substantially planar dielectric layer on a semi-
conductor substrate. The method entails depositing a sacrificial
layer in a manner that results in an etch to deposition ratio
which substantially etches away the angled facets of a gap fill
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