Appeal No. 1999-0495
Application No. 08/752,729
BACKGROUND
The invention is directed to a method for executing computer instructions in
parallel, with management of exception conditions that may occur. Exception
conditions are signals used to indicate unexpected conditions during processing.
Representative claim 18 is reproduced below.
18. A method for executing instruction in parallel in a computer system,
comprising:
identifying each instruction to be executed with an identification which is
independent of an execution order;
reordering the instructions independent of the identification of the
instructions;
executing the instructions in parallel as a plurality of execution flows, each
instruction of each corresponding execution flow identified with the
corresponding execution flow, the instructions of each execution flow executing
in parallel with each other;
determining if a particular instruction is subject to an exception condition;
identifying a particular execution flow corresponding to the identification of
the particular instruction; and
repeating executing of the instructions of the particular execution flow to
resolve the exception condition.
The examiner relies on the following references:
Kodama 5,287,466 Feb. 15, 1994
(filed Mar. 25, 1991)
Popescu et al. (Popescu) 5,561,776 Oct. 1, 1996
(effectively filed Dec. 5, 1990)
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