Appeal No. 2002-0397
Application 08/925,968
BACKGROUND
The invention relates to a method and apparatus for
interfacing binary signals of different voltage levels.
Claim 1 is reproduced below.
1. An apparatus comprising:
a transistor having an enable terminal, an input
terminal, and an output terminal, said input terminal
coupled to receive binary signals that vary between first
and second preselected voltage levels, and said output
terminal coupled to deliver binary signals that vary between
the first preselected voltage level and a third preselected
voltage level;
a capacitor coupled across said input and output
terminals of said transistor; and
a resistive element having a first end portion coupled
to the enable terminal of said transistor and a second end
portion coupled to a voltage supply to bias the transistor
continuously on, the resistive element cooperating with a
parasitic capacitor defined by said transistor to increase
the voltage applied to the enable terminal during a
transition from the first to the second preselected voltage
level at the input terminal.
The examiner relies on the following references:
Nelson 4,507,618 March 26, 1985
Townley 4,970,478 November 13, 1990
Carroll 5,130,571 July 14, 1992
Ohmi et al. (Ohmi) 5,604,364 February 18, 1997
Storino et al. (Storino)2 6,111,422 August 29, 2000
(effective filing date December 7, 1995)
Ciraula et al. (Ciraula) 6,111,434 August 29, 2000
(filed July 21, 1997)
2 Not listed in the prior art in the examiner's answer,
page 3, but mentioned in the examiner's answer at page 5.
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