Appeal No. 2002-0528
Application No. 09/524,519
Liaw describes a device comprising a P-doped <100> oriented
monocrystalline silicon wafer 10, field oxide isolation
structure 12 formed by local oxidation of silicon (LOCOS), and a
residual pocket 16 formed from a silicon oxide layer 14.
(Column 3, line 11 to column 4, line 13; Figure 4.) As
acknowledged by the examiner (answer, page 3), Liaw’s device
differs from the invention recited in appealed claim 25 in that
it lacks “channel-stop implant regions formed by implanting a
dopant through said field oxide and through said sidewall
portions formed from said insulating layer, said channel-stop
implant regions having a modified implant profile resulting from
said implanting of said dopant through said sidewall portions
thereby increasing said threshold voltages and reducing said
leakage currents.”
In an attempt to account for this difference, the examiner
relies on Figure 1 (prior art) of the present specification.
(Answer, page 3.) Specifically, the examiner’s position is
stated as follows (id.):
[A]pplicant [sic, applicants’] admitted prior
art show [sic, shows] that it is well known in the art
to form channel-stop regions (34) on the semiconductor
substrate (10) after the formation of the field oxide
(20) to reduce leakage current. (See Fig. 1).
Therefore, it would have been obvious to one
having ordinary skill in the art at the time the
invention was made to form channel-stop regions after
the formation of the field oxide and the sidewall
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