Ex Parte FALLON et al - Page 2




             Appeal No. 2003-0200                                                               2              
             Application No. 09/250,524                                                                        

             in this application.                                                                              
                     THE INVENTION                                                                             

             The invention is directed to a carrier module containing in part, an array of chip                
             bonding pads and a wiring layer on a substrate.  The wiring layer includes flat metal             
             terminals which are physically separated and different from bonding pads.  Additional             
             limitations are described in the following illustrative claim.                                    


                                                THE CLAIMS                                                     

             Claim 57 is illustrative of appellants’ invention and is reproduced below.                        

             57.  A module, for subsequent placement onto an interconnect structure, comprising:               
                   a substrate having a chip bonding surface;                                                  
                   an array of chip bonding pads on the chip bonding surface;                                  
                   a computer chip bonded to the bonding pads;                                                 
                   a wiring layer on the substrate including flat metal terminals said flat metal terminals    
                   physically separated and different from said bonding pads;                                  
                   first bumps of a different metal having a melting temperature substantially lower           
                   than the melting temperature of said metal terminals, said first bumps in direct            
                   contact with and attached to said metal terminals;                                          
                   second bumps of a solder material having a melting temperature substantially lower          
                   than said melting temperature of said different metal of said first bumps, said second      
                   bumps covering said first bumps.                                                            









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