Ex Parte SABIN et al - Page 1




               The opinion in support of the decision being entered                   
               today was not written for publication in a law journal                 
               and is not binding precedent of the Board.                             
                                                               Paper No. 12           


                      UNITED STATES PATENT AND TRADEMARK OFFICE                       
                                                                                     
                         BEFORE THE BOARD OF PATENT APPEALS                           
                                  AND INTERFERENCES                                   
                                                                                     
                     Ex parte GREGORY D. SABIN, WILLIAM J. GROSS                      
                                 and JUNG-YUEH CHANG                                  
                                                                                     
                                Appeal No. 2003-0241                                  
                             Application No. 09/271,615                               
                                                                                     
                                      ON BRIEF                                        
                                                                                     
          Before KIMLIN, WALTZ and MOORE, Administrative Patent Judges.               
          KIMLIN, Administrative Patent Judge.                                        


                                 DECISION ON APPEAL                                   
               This is an appeal from the final rejection of claims 1-31.             
          Claim 1 is illustrative:                                                    
               1.  A method for forming a bonding pad structure over an               
          active circuit of an integrated circuit device, the method                  
          comprising the steps of:                                                    
                         depositing a metal layer over said active circuit;           
                         patterning and etching said metal layer to form an           
          array of openings in said metal layer;                                      


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