Appeal No. 2003-2096
Application No. 09/847,202
OPINION
The examiner finds that appellants’ prior art figures show
an integrated circuit structure comprising active regions of
semiconductor material (660), an isolation region (610) within a
trench of the semiconductor material, an electrically insulating
liner (620) disposed in the trench with a portion of the liner
extending over the active region, a first portion of the
isolation region conformal to the surface of the semiconductor
material, and a second portion of the isolation region extending
above the surface of the active regions (Answer, pages 3-4). The
examiner finds that the prior art figures 3-6d show all the
claimed elements except the sidewall spacers on the isolation
region (Answer, page 4).
The examiner applies Luning to show a trench isolation
structure in which dielectric sidewall spacers (52) are formed on
and extending over an isolation region (47) and inclined toward
the isolation region from a semiconductor surface (41) to prevent
oxide loss at the edge of the trench during etching (id.). From
these findings, the examiner concludes that it would have been
obvious to one of ordinary skill in the art at the time the
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