in its argument section of its motion. It is too late for Yamagami to do so now. Note further,
that incorporation by reference of arguments is not permitted. See Paper 1, Standing Order § 13.
Furthermore, in deciding Yamagami preliminary motion 1, we did not consider Yamagami’s
reply. Because Yamagami’s preliminary motion 1 failed to set forth a prima facie case for
entitlement to relief, Harari’s opposition to Yamagami’s preliminary motion 1 was not
considered. Consequently, Yamagami’s reply need not have been considered. In any event, we
have considered the statements of facts, paragraphs in the Kimura declaration and arguments
made in Yamagami reply that Yamagami now direct us to and do not find the argument now
advanced, i.e. that there is insufficient detailed description of how to make or use the controller
31 to perform the claimed conversion with respect to sector remapping.
Yamagami argues that our statement on page 17, lines 2-11 of our decision that “we note
that Yamagami’s own Expert admits that the controller 31 performs a logical address to a
physical address conversion operation in one embodiment (Exhibit 2001, page 5, paragraph 13)”
is not true. Yamagami argues that there is no admission by Kimura at any point in his
declaration (Recon. 4). We agree that paragraph 13 of the Kimura declaration does not support
the statement made in our decision. Accordingly, we modify the decision, by deleting lines 8-11
on page 17, beginning with “We note....” The change to our decision to delete the above noted
sentence, however, does not change the overall outcome of our decision to deny Yamagami
preliminary motion 1.
Yamagami argues that the panel erred when it attributed the stated feature in the Harari
specification of providing a flash EEPROM memory which remains reliable after enduring a
large number of write/erase cycles to cell and sector defect re-mapping. Yamagami argues that
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