Appeal No. 2001-2013
Application No. 08/869,592
10. Apparatus for processing a signal, comprising:
a plurality of signal processing circuits, which are
sequentially connected;
at least a first of said plurality of signal processing
circuits including means for dividing and shuffling an input
signal into predetermined units;
at least a second of said plurality of signal processing
circuits including means for adding header information which
includes timing data and shuffling data to each of said
predetermined units of said input signal; and
wherein signal processing circuits succeeding said at least
a second of said plurality of signal processing circuits perform
predetermined signal processing on said predetermined units of
said input signal in accordance with said timing data and said
shuffling data included in said header information contained
therein without regard to processing delays of said signal
processing circuits to generate units of data.
The prior art references of record relied upon by the
examiner in rejecting the appealed claims are:
Gonzales et al. (Gonzales) 5,289,577 Feb. 22, 1994
Smidth et al. (Smidth) 5,301,018 Apr. 05, 1994
(effectively filed Feb. 13, 1991)
Siracusa 5,483,287 Jan. 09, 1996
(effectively filed Jun. 19, 1992)
Claims 12 and 13 stand rejected under 35 U.S.C. § 102(e) as
being anticipated by Smidth.
Claims 3 through 5, 10, and 11 stand rejected under
35 U.S.C. § 103 as being unpatentable over Gonzales in view of
Siracusa and Smidth.
Reference is made to the Examiner's Answer (Paper No. 21,
mailed September 25, 2000) for the examiner's complete reasoning
in support of the rejections, and to appellant's Brief (Paper No.
2
Page: Previous 1 2 3 4 5 6 Next
Last modified: November 3, 2007