Appeal No. 2002-1217
Application No. 09/006,808
BACKGROUND
Appellants’ invention relates to low power signal detection for an autonegotiation
system. An understanding of the invention can be derived from a reading of exemplary
claim 1, which is reproduced below.
1. An integrated circuit comprising a multiple data-rate receiver comprising
a first receiver section adapted to receive at a relatively low data rate and a
second receiver section adapted to receive at a relatively high data rate,
characterized by a first comparator for detecting a relatively low data rate
signal and a second comparator for detecting a relatively high data rate signal,
and logic circuitry for activating said first receiver section when said first
comparator detects said relatively low data rate signal and for activating said
second receiver section when said second comparator detects said relatively
high data rate signal.
The prior art reference of record relied upon by the examiner in rejecting the
appealed claims is:
Appellants’ Admitted Prior Art (AAPA) at page 1-3 of the specification and Figures 1-3.
Claims 1-13 stand rejected under 35 U.S.C. § 102 as being anticipated by AAPA.
Rather than reiterate the conflicting viewpoints advanced by the examiner and
appellants regarding the above-noted rejections, we make reference to the examiner's
answer (Paper No. 15, mailed Jun. 4, 2001) for the examiner's reasoning in support of
the rejections, and to appellants’ brief (Paper No. 14, filed Apr. 2, 2001) for appellants’
arguments there against.
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