Appeal No. 2002-2072
Application No. 09/332,360
to support the examiner’s allegation. The examiner has done just
that, citing U.S. Patent Nos. 5,640,030, 5,682,344, 5,341,326 and
5,805,495.
The burden now shifted to appellants to show, by argument,
or objective evidence, why the cited references do not show what
the examiner alleges they show. Since appellants have not
responded to the examiner’s showing, we will sustain the
examiner’s rejection of claim 3 under 35 U.S.C. § 103.
Finally, turning to claim 4, it is the examiner’s position
that Chang discloses a bitline connected to a bitline contact but
that Figure 3 did not explicitly show the bitline overlying a
plurality of transistors and that the conductive plate is
patterned so that it does not affect alignment relationships in
the connections between the bitline and the transistors.
The examiner alleges that since the bitline contact is
clearly located between the conductive strips in Figure 3 of
Chang, the formation of the conductive plates “inherently does
not affect alignment relationship in the connections between the
bitline and the transistors” and that “the bitline is formed
overlying the transistors is well known and conventional in the
art” (answer-page 5).
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