Appeal No. 2002-2164
Application No. 09/067,599
“first” and a “second” memory, as recited in instant claim 15. Appellants argue that
Dosiere only discloses a single memory.
Appellants’ argument appears to be founded on the view that the claims
somehow require two separate memory chips. Appellants’ disclosure (e.g., Fig. 1)
refers to separate boxes representing Pattern RAM and Mask RAM, which may be
suggestive of separate memory chips. Appellants, however, point to nothing in the
record to indicate that the scope of the instant claims should be limited to the disclosed
embodiment. On the contrary, claims are to be given their broadest reasonable
interpretation during prosecution, and the scope of a claim cannot be narrowed by
reading disclosed limitations into the claim. See In re Morris, 127 F.3d 1048, 1054, 44
USPQ2d 1023, 1027 (Fed. Cir. 1997); In re Zletz, 893 F.2d 319, 321, 13 USPQ2d 1320,
1322 (Fed. Cir. 1989); In re Prater, 415 F.2d 1393, 1404-05, 162 USPQ 541, 550
(CCPA 1969).
Dosiere describes a “first memory” constituting a table containing information
with respect to the next set of bits to be searched for in the bitstream. The method
determines if a received m-bit set forms part of the n-bit pattern in the bitstream. Col. 4,
l. 47 - col. 5, l. 7. In the case that the first m-bit set forms part of the n-bit pattern, the
first memory contents is a pointer to a second memory location, which contains match
and mask patterns. Col. 5, ll. 20-52. Even assuming that what Dosiere refers to as
“first memory” and “second memory location” is to be interpreted as memory contents
within a single physical memory chip, we do not consider the instant claims to set forth
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