Appeal No. 2003-0796 Application No. 09/260,031 processing for applying the texture data on the surface of the graphic element based on the stored data. Representative independent claim 6 is reproduced below: 6. An image processing apparatus for performing rendering by receiving polygon rendering data including three-dimensional coordinates (x, y, z), R (red), G (green), and B (blue), homogeneous coordinates (s, t) of a texture, and a homogeneous term q with respect to vertexes of a unit graphic, said image processing apparatus comprising: a memory circuit for storing display data and texture data required by at least one graphic element; an interpolation data generation circuit for interpolating the polygon rendering data of vertexes of the unit graphic to generate interpolation data of pixels positioned inside the unit graphic; and a texture processing circuit for dividing the homogeneous coordinates (s, t) of a texture included in the interpolation data by the homogeneous term q to generate “s/q” and “t/q”, using a texture address corresponding to the “s/q” and “t/q” to read texture data from the memory circuit, and applying the texture data on the surface of the graphic element of the display data; the memory circuit, the interpolation data generation circuit, and the texture processing circuit being accommodated in one semiconductor chip. The Examiner relies on the following references in rejecting the claims: Hannah et al. (Hannah) 5,706,481 Jan. 6, 1998 Coelho 6,107,987 Aug. 22, 2000 (effectively filed Apr. 29, 1994) Foley et al. (Foley), “Computer Graphics, Principles and Practice,” Second edition, Addison-Wesley, 1997, pp. 204- 205. 2Page: Previous 1 2 3 4 5 6 7 8 NextLast modified: November 3, 2007