Appeal No. 2003-1110
Application No. 09/295,439
issuer unit (498) with a bit map of the instructions that are
suitably unconstrained to be executed (col. 33, lines 20-23
and 28-31). Instructions that carry dependencies are logically
removed from the bitmap (col. 33, lines 31-33). The instruction
issuer unit provides control signals for initiating and
subsequently managing the execution of instructions to the
register rename unit and selectively to parallel functional
units (4780-n) (col. 32, lines 33-34; col. 33, lines 38-42). A
bypass control unit (520) monitors the status of the functional
units and, in conjunction with the register references provided
from the register rename unit, determines whether data is to be
routed from a register file (472) to the functional units, or
whether data being produced by the functional units can be
immediately routed via a bypass unit (474) to a functional unit
distribution bus (480) for use in executing a newly issued
instruction scheduled by the instruction issuer unit (col. 33,
lines 52-61).
The examiner’s explanation of the rejection of claims 27
and 38 is as follows (answer, pages 4-5):
4
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