Appeal No. 2003-2175
Application No. 09/712,234
The subject matter on appeal is directed to a process for
manufacturing a semiconductor device. Further details of this
process are provided in representative claim 1 which is reproduced
below:
1. A method of manufacturing a semiconductor device,
the method comprising:
providing a silicon-containing semiconductor
substrate, having an upper surface, comprising: a gate
electrode formed on the substrate upper surface with a
gate insulating layer therebetween, the gate electrode
having an upper surface and opposing side surfaces;
amorphizing selected regions of the semiconductor
substrate;
forming source/drain regions by doping the selected
regions of the semiconductor substrate with a dopant;
depositing a metal layer over the semiconductor
substrate; and
annealing the semiconductor substrate, wherein said
metal layer is exposed, with a single heating step at a
temperature of about 350/C to less than about 850/C for
about 30 seconds to 60 minutes, to simultaneously
activate the source/drain regions and to react the metal
layer with underlying silicon in the gate electrode and
source/drain regions to form metal silicide contacts.
The examiner relies on the following prior art references:
Chong et al.(Chong) 6,335,253 Jan. 01, 2002
(Filed Jul. 12, 2000)
Yamazaki et al.(Yamazaki) 0,011,598 Jan. 31, 2002
(Filed Aug. 27, 2001)
2
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