Appeal No. 2004-0040
Application No. 09/273,820
Representative claim 1 is reproduced below:
1. A method for performing design tests on a circuit
design comprising the steps of:
(a) evaluating a first file that identifies at least
one test;
(b) evaluating a second file that identifies at least
one test;
(c) executing a plurality of predefined tests,
excluding tests that are identified in the first file
and tests identified in the second file.
The following reference is relied on by the examiner:
Van Huben et al. (Van Huben) 6,094,654 Jul. 25, 2000
(filed Jun. 24, 1998)
Claim 1 through 3, 7, 9, 10, and 15 through 18 stand
rejected under 35 U.S.C. § 102(e) as being anticipated by Van
Huben.
Rather that repeat the positions of the appellant and the
examiner, reference is made to the brief and reply brief for
appellant’s positions and the answer for the examiner’s
positions.
OPINION
For the reasons set forth by the examiner in the answer as
amplified upon here, we sustain the rejection of all claims on
appeal under 35 U.S.C. § 102.
2
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