Appeal No. 2005-0261 Application No. 09/682,473 Representative claim 8 is reproduced as follows: 8. A method of driving a clock tree on an integrated circuit (IC), the method comprising the steps of: providing an IC having a clock tree; distributing a clock signal in the form of a differential sinusoidal signal pair in a portion of the clock tree, the differential sinusoidal signal pair comprising a first sinusoidal signal and a second sinusoidal signal; and generating a local clock signal from the differential pair by employing both the first sinusoidal signal and the second sinusoidal signal to form the local clock signal. The examiner relies on the following references: Matsumoto et al. (Matsumoto) 5,448,188 Sep. 5, 1995 Wissell et al. (Wissell) 6,184,736 Feb. 6, 2001 Claims 8 and 13 stand rejected under 35 U.S.C. § 103(a). As evidence of obviousness the examiner offers Wissell in view of Matsumoto. Rather than repeat the arguments of appellants or the examiner, we make reference to the briefs and the answer for the respective details thereof. OPINION We have carefully considered the subject matter on appeal, the rejection advanced by the examiner and the evidence of obviousness relied upon by the examiner as support for the rejection. We have, likewise, reviewed and taken into 2Page: Previous 1 2 3 4 5 6 7 8 9 NextLast modified: November 3, 2007