Ex Parte Street et al - Page 2



          Appeal No. 2005-0776                                                        
          Application No. 09/898,321                                                  

          second lines, an air gap between the top surface of one line and            
          the bottom surface of the other line.  Claim 1, which claims the            
          integrated circuit, is illustrative:                                        
                    1.  An integrated circuit comprising:                             
                    a plurality of pixel circuits arranged in rows and                
               columns;                                                               
                    a plurality of first lines, each first line connected             
               to a corresponding column of pixel circuits; and                       
                    a plurality of second lines, each second line connected           
               to a corresponding row of pixel circuits,                              
                    wherein the plurality of first lines are formed such              
               that each first line extends over the plurality of second              
               lines at corresponding crossover locations, and                        
                    wherein an air-gap is defined at each crossover                   
               location that separates each first line from the plurality             
               of second lines, wherein each air-gap extends from a top               
               surface of a corresponding second line to a bottom surface             
               of said each first line.[1]                                            
                                   THE REFERENCES                                     
          Antonuk et al. (Antonuk)          5,262,649        Nov. 16, 1993            
          Kingsley et al. (Kingsley)        5,587,591        Dec. 24, 1996            
          Pedder                            5,604,658        Feb. 18, 1997            
          Fukuda et al. (Fukuda)            5,623,161        Apr. 22, 1997            

               1 It appears that in claim 8, in “a plurality of gate lines,           
          each gate line connected to the access transistors of a                     
          corresponding column of pixel circuits”, “column” should be                 
          “row”, and in “a plurality of data lines, each data line                    
          connected to the access transistors of a corresponding row of               
          pixel circuits”, “row” should be “column”.  See the                         
          specification, page 4, last sentence of paragraph 0007, and                 
          page 7, last sentence of paragraph 0019.                                    
                                          2                                           




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