Appeal No. 95-1851
Application 07/902,186
said frame buffer memory means to said display means;
frame buffer write detect means for detecting a write
of a new value of display data into said frame buffer
memory means;
address detect means coupled to said frame buffer write
detect means for determining an affected address where
said new value of display data is stored within said
frame buffer memory means in response to said frame
buffer write detect means;
address translate logic means for generating an
appropriate start address for updating said display means based
on said affected address within said frame buffer memory means
where said new value of display data was stored; and
blocking means for selectively blocking memory accesses
to said frame buffer memory means which fall outside
the range of applicable display data for said display
means.
3. A method for providing automatic virtual display
panning for driving VGA display data on a lower
resolution display consisting of the steps of:
providing frame buffer memory means for storing a full
resolution VGA image;
providing display means coupled to said frame buffer
memory means and having a resolution less than the
resolution of said frame buffer memory means for
providing a display;
providing VGA controller means for transferring display
data in said frame buffer memory means to said display
means;
providing frame buffer write detect means for detecting
a write of a new value of display data into said frame
buffer memory means;
providing address detect means coupled to said frame
buffer write detect means for determining an affected
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Last modified: November 3, 2007