Appeal No. 95-2665
Application 07/999,609
Representative claim 5 is reproduced below:
5. A non-volatile semiconductor memory cell comprising:
a semiconductor substrate;
a source having a first portion and a second portion therein
formed in said semiconductor substrate;
a drain formed in said semiconductor substrate spaced from
said source;
a channel including a first portion, a second portion, and a
third portion therein disposed between said drain and said
source, said channel having a conductivity;
an elongated Y-control trace dielectrically disposed atop
said third portion of said channel and said first portion of said
source;
an elongated X-control trace dielectrically disposed atop
said Y-control trace and substantially perpendicular therewith;
said X-control trace having a portion thereof dielectrically
disposed atop said first portion of said channel; and
a floating gate having a first segment thereof
dielectrically disposed between said X-control and Y-control
traces, a second segment thereof dielectrically disposed atop
said second portion of said channel, and a third portion thereof
dielectrically disposed atop said second portion of said source;
wherein when said X-control and Y-control traces are
substantially simultaneously positively energized, electrical
charges are couplingly induced in said floating gate from said
channel by source side injection effect allowing said floating
gate to couplingly vary the conductivity of said channel after
de-energization of said control traces, thereby enabling the
non-volatile memory cell to be programmable, and wherein when
said X-control and Y-control traces are substantially
simultaneously negatively energized, electrical charges are
couplingly induced out of said floating gate to said source by
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