Appeal No. 95-4183
Application 07/945,714
wherein said address determination circuit responds to
said second address signal to output a determination signal
indicating whether or not a value of said second address signal
indicates any of said pattern lines;
wherein said selector circuit responds to said
determination signal from said address determination circuit and
output of said read only pattern memory to output said output of
said read only pattern memory when said determination signal from
said address determination circuit indicates any of said
character pattern lines, and responds to said determination
signal and independently of an output of said pattern memory to
output a bit pattern signal of only space data when said result
of the determination does not indicate that the value indicates
one of said display pattern lines, so that said pattern memory
does not need to store said bit patterns of said space display
line;
wherein said selector circuit receives the bit pattern
output from said pattern memory that corresponds to the display
pattern lines and uncertain data bits respectively when the
determination signal indicates and does not indicate that the
value of the address signal indicates one of the display pattern
lines, and in response to said determination signal respectively
passes the bit pattern or generates space bits as character
pattern line output of the character generator.
The examiner relies on the following reference:
Kitano 4,772,883 Sep. 20, 1988
Claim 14 stands rejected under 35 U.S.C. 103 as
unpatentable over Kitano.
We make reference to the many briefs and answers for
the respective positions of appellant and the examiner.2
The principal brief and reply brief, principal answer and2
first supplemental answer are mainly directed to claims which are
no longer pending. The issue remaining before us regarding the
-3-
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