Appeal No. 94-3710 Application 07/777,608 indicate that the entry in the cache contains a copy of the data that is in the main memory. Kaplinsky discusses presence bits in its description of semi-associative caches, which are a compromise between a tagged cache and an associative cache. Id., at col. 10, lines 13-14. The address for each entry in the cache contains L label bits and I index bits. Thus, the semi-associative cache L I is divided into 2 sub-caches each containing 2 entries. When checking to see if a particular word is in the cache, the L label bits are compared against a content addressable memory. If there is a hit, this means the sub-address space for the particular word is mapped into a sub-cache. The sub-cache is not filled all at once; rather, each word is copied in when it is used (as per normal caching principles). Thus, there is a presence bit associated with each entry in the cache that is set only if the appropriate word has been copied from the main memory into that entry (i.e., the data in that entry is valid). The presence bits are stored in a 2 x 1 RAM that is associated with each sub-I cache. See col. 10, line 47 - col. 11, line 9. The 2 x 1 RAM in Kaplinsky merely contains the presenceI 7Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 NextLast modified: November 3, 2007