Appeal No. 95-4172 Page 2
Application 08/040,698
8. A method for simultaneous high resolution
display within multiple applications in a data
processing system having a processor, a memory
coupled to said processor, a display device coupled
to said memory and said processor and a display
adapter coupled to said display device and said
processor which includes a physical video buffer
said method comprising the steps of:
providing a logical video buffer within said
memory, said logical video buffer including a bank
management function for receiving a multibank high
resolution graphic display output which includes
both bank and video data from one of a plurality of
applications within said data processing system;
detecting an attempt by said one of said
plurality of applications within said data
processing system to output a multibank high
resolution graphic display to said physical video
buffer within said display adapter;
writing said multibank high resolution graphic
display output from said one of said plurality of
applications within said data processing system to
said logical video buffer; and
subsequently writing said logical video buffer
to said physical video buffer in response to a
transition of said one of said plurality of
applications from a background task to a foreground
task.
The examiner rejected all of the claims under 35 U.S.C.
§ 103 in view of the following references:
Schumacher 4,567,515 28 Jan. 1986
Agarwal 4,688,167 18 Aug. 1987
Agarwal discloses the claimed hardware and the buffers
for handling multiple application displays as virtual displays
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