Appeal No. 95-4913
Application No. 07/962,425
Claims 5 and 10 stand rejected under 35 U.S.C. § 103 as
being unpatentable over the admitted prior art in view of
Flemming, Heckel and Azevedo.
Reference is made to the brief and the answer for the
respective positions of the appellants and the examiner.
OPINION
We have carefully considered the entire record before us,
and we will reverse the obviousness rejection of claims 1, 3
through 6 and 8 through 10.
In the admitted prior art (specification, page 3), the
solution for “avoiding metastability has been to double latch all
data input into the receiving device” during all periods of time.
Flemming also avoids the metastability problem by altering one of
the clock outputs from the single clock generating source 42
(Figure 5) with a phase lock loop circuit (Figure 6). We agree
with the examiner (Answer, page 5) that “Heckel discloses means
for inputting data directly.” On the other hand, we agree with
appellants (Brief, pages 5 and 6) that:
Heckel describes a one-clock system. The problems
which Applicants desire to solve arise only in a system
having two asynchronous clocks. Applicants[’] method
and system are directed to solving metastability
problems. Heckel does not discuss metastability
problems or solutions to these problems. Heckel
describes a buffering system used when transmitting
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