Appeal No. 96-1246
Applicaton No. 08/205,812
implement the equations shown in Figures 3 through 10 in
parallel. On pages 9 and 10 of the brief, Appellants point to
pages 8 through 11 of the specification which describe in
detail a device for implementing execution of instruction in
parallel. Appellants further point to page 6 of the
specification which discloses that a commercially available
processor, Texas Instruments TMS 320, is capable of
implementing the invention.
Upon a careful review of the specification, we find that
the Examiner did not have a reasonable basis for questioning
the sufficiency of the disclosure, and thereby the burden did
not shift to the Appellants to come forward with evidence to
rebut this challenge. Therefore, we will not sustain the
Examiner's rejection under 35 U.S.C. § 112, first paragraph.
Claim 19 stands rejected under 35 U.S.C. § 112, second
paragraph, for failing to particularly point out and
distinctly claim the subject matter which applicants regard as
the invention. Analysis of 35 U.S.C. § 112, second paragraph,
should begin with the determination of whether the claims set
out and circumscribe a particular area with a reasonable
degree of precision and particularity; it is here where
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