Appeal No. 96-1449
Application 08/188,630
This is a decision on appeal under 35 U.S.C. § 134 from
the final rejection of claims 9-28, all of the claims
pending in the application.
We reverse.
BACKGROUND
The disclosed invention is directed to a stacked
capacitor structure for semiconductor memory devices.
Storage electrodes of prior art stacked capacitors are
limited in distance from neighboring circuit elements and
from each other by the minimum lithographic feature size F,
as shown in figure 4. Appellant forms a conformal conductor
layer over the storage electrode to a thickness T enlarging
the dimensions of the storage electrode by 2T, which reduces
the distance between neighboring circuit elements, as shown
in figure 5.
Claim 9 is reproduced below.
9. A microelectronic device, said microelectronic
device comprising:
a) a substrate including a conductive region;
b) an insulating layer overlying said substrate
having a storage node contact window overlying a
selected area of said conductive region;
c) a storage electrode comprising a stem-shaped
- 2 -
Page: Previous 1 2 3 4 5 6 7 8 9 10 Next
Last modified: November 3, 2007