Appeal No. 96-1979
Application 08/041,770
impermissible hindsight. We find no reason for the artisan to have modified Ely in the manner described
by the examiner.
While we can agree, in general, that it was well known to write data to multiple stores of a
multi-processor system in order to maintain data consistency, it would appear that such was well
known in cache environments so that each processor has access to the same data in memory but we
agree with appellants [reply brief - page 2] that “the concept of cache tags has no nexus to the present
invention.” Clearly, such cache tags are employed for data consistency and have no relationship to the
contention operation during a system failure of the instant claimed invention. Thus, the examiner’s
reasoning for modifying Ely to provide for the claimed tag writing to each processor is faulty and no
prima facie case of obviousness is seen to have been established.
We further agree with appellants that Ely appears to “teach away” from the claimed subject
matter because, whereas the instant claimed subject matter involves the exchange of messages between
each processor, Ely explicitly avoids such a system as being too “slow, tedious and expensive,
particularly in attempting to handle pluralities of simultaneous failures” [Ely, column 4, lines 7-10].
Accordingly, the artisan would hardly look to the disclosure of Ely, which teaches the selection of a
replacement master processor by setting the order of selection by preselecting the order in which the
requests by processors to take over the function of master processor are queued [Ely, column 5, lines
7-15], as a suggestion to provide an assigning means for executing a contention operation wherein each
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