Appeal No. 96-2528
Application 08/011,202
35 U.S.C. § 103, we will sustain each of the two rejections
set forth by the examiner, one for claims 1-3 and the other
for claim 4, for the reasons set forth by the examiner in the
statement of the rejection portion of the answer at pages 5-7
as well as the additional responsive arguments portion of the
examiner at pages 9-11.
As to the appellants’ position at page 4 of the brief
that the structure of claim 1 relating to the gate electrode
surrounding the sidewalls of the channel not being met has
been addressed by the examiner at pages 9 and 20 of the
answer. There, the examiner correctly points out that the
claim does not require that the gate electrode completely
surround the sidewalls of the channel region even though the
Figure 2 depiction of the disclosed invention does so. In any
event, we agree with the examiner’s view that it was commonly
known for better control of the channel current to do so,
which position is not challenged by appellants. Furthermore,
in light of Onda’s teachings, we are also persuaded of the
obviousness of this feature since Onda teaches of enhancing
the transconductance striped channel FET heterostructure
device by so constructing his FET as to increase two
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