Appeal No. 96-4106
Application No. 08/271,238
circuit means ) are found in the teachings of McDonald. In3
view of the grouping of the claims (Brief, pages 4 and 5), the
obviousness rejection of claims 27 and 28 is likewise
sustained.
Turning to claim 31, the lock-step operation in McDonald
precludes “temporarily holding each instruction of the
instruction stream before communicated to the second processor
unit.” Thus, the obviousness rejection of claims 31 through
33 is reversed because we agree with the appellants that
“McDonald et al. specifically teaches lock step operation of
pairs of CPUs,” and that “[t]his is not what claim 31
specifies” (Brief, page 9).
Claims 35 and 36 require that the data or instruction
words be provided to one digital circuit, and that the data or
instruction words be provided to another digital circuit “at
least one clock period after” or during “subsequent” clock
periods. The claimed lagging operation is opposite to the
3Appellants have not relied on the 6th paragraph of
35 U.S.C. § 112 to distinguish the claimed invention over
McDonald, and have not rebutted the examiner’s finding of
equivalence (Answer, pages 8 and 9) between the claimed means
for “emulating” and the structure found in McDonald.
8
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