Appeal No. 95-3876
Application 08/222,009
Claim 13, which is separately argued, depends on
claim 14 through unargued claim 12, which recites a constant
voltage generating means for applying a predetermined constant
voltage to the gate of the IGBT. Claim 13 further limits
claim 12 by specifying that the predetermined constant voltage
is applied from the main capacitor. Such an arrangement is
represented by appellants' Figure 6(a), wherein DC voltage
from the main capacitor C3 (Fig. 1) is applied to the IGBT
gate when transistor Q7 is turned on by a flash trigger signal
(Spec. at 25:14-16). In Figure 3 of Iwata, the DC voltage for
developing the gate voltage for FET 15 is provided by constant
voltage generation circuit 17, which provides at the emitter
of transistor 37 a voltage which is stabilized by a zener
diode (col. 3, line 68 to col. 4, line 3). The examiner
argues (Answer at 5-6) that it would have been obvious to
alternatively obtain the DC voltage for the gate of the FET
(or the substituted IGBT) from any suitable source of DC
voltage, including Iwata's main capacitor 1. Because
appellants have not challenged this reasoning in their opening
brief or their reply brief, I would also affirm the rejection
of claim 13 for obviousness over the cited prior art.
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