Appeal No. 96-1567 Page 2
Application No. 08/112,914
BACKGROUND
The appellant's invention relates to a semiconductor trench isolation structure. The
trench is formed and manufactured in a manner to avoid any offset thereby avoiding a
steep step in a transistor region which would increase the leakage current of the transistor.
An understanding of the invention can be derived from a reading of exemplary claim 13,
which is representative of the claimed invention and reproduced below:
13. A semiconductor device for supporting a plurality of mutually electrically
isolated semiconductor elements, comprising:
a semiconductor substrate of a first conductivity type having a major
surface; and
an isolation structure for electrically isolating semiconductor elements
on said substrate from each other, the isolation structure including
(a) a plurality of island regions for said semiconductor
elements, separated by trenches formed on the major surface
of said semiconductor substrate, each of said trenches
including first and second substantially parallel opposed
sidewalls and a bottom surface, said first opposed sidewall
being of at least a given width within a common plane;
(b) a first isolated oxide film formed on said first opposed
sidewall and extending from said bottom surface of said trench
to said major surface, said first isolated oxide film
limited to less than the given width of said first opposed
sidewall and spaced apart from said second opposed
sidewall;
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