Appeal No. 1996-1664
Application No. 08/272,647
alternates in a periodic manner between a first
substantially fixed voltage level, and a second
substantially fixed voltage level. This same Figure
clearly shows that: the first voltage level is at
that level for a first time period; the second
voltage level is at that level for a second time
period; the duration of the first period is
substantially different from the duration of the
second period; the output voltage consists of
repeating cycles; the sum of the first and second
time periods equals the total cycle period; and that
each cycle has a total cycle period.
Appellant’s argument that Quazi does not
disclose a non-symmetrical voltage waveform is not
commensurate in scope with the claimed invention.
Nothing in exemplary claim 31 states that each
voltage waveform spends more time "on one side of
the zero line than on the other side of the zero
line." The frame of reference in claim 31 for the
inverter output voltage levels is a time line, and
not a zero line . . . .
In a February 9, 1996 decision in the grandparent
application, the Board stated inter alia that "a variation in
the magnitude of the AC voltage . . . occurs in . . . Quazi as
a result of the pulse-width modulation of the above-noted
signals" (Decision, page 9), and that "[s]uch a voltage
decrease with changing duration of signal levels appears to us
to be consistent with the teachings of . . . Quazi as to
dimming control by pulse-width modulating the inverter output
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