Appeal No. 96-2722
Application 08/281,168
Whatley 4,342,926 Aug. 3, 1982
Bennett et al. (Bennett) 5,029,295 July 2, 1991
Williams et al. (Williams) 5,296,765 Mar. 22, 1994
(filed Mar. 20, 1992)
Gray and Meyer, "Analysis and Design of Analog Integrated Circuits", John Wiley & Sons, Inc., 3rd.
ed., pp. 325-27 (1993).
Claims 1 to 12 and 26 to 35 stand rejected under 35 U.S.C. § 103. As evidence of
obviousness, the examiner relies upon applicants’ admitted prior art, Gray and Meyer, and Bennett.
Claims 13 to 25 and 36 to 46 stand rejected under 35 U.S.C. § 103. As evidence of
obviousness, the examiner relies upon applicants’ admitted prior art, Gray and Meyer, Bennett, and
Williams.
Claims 47 to 53 stand rejected under 35 U.S.C. § 103. As evidence of obviousness, the
examiner relies upon applicants’ admitted prior art, Gray and Meyer, Bennett, Williams, and Whatley.
Rather than repeat the positions of appellants and the examiner, reference is made to the Briefs
and the Answer for the respective details thereof.3
upon Aoyama et al. and Sedra & Smith. In explaining the rejection of claims 1 to 53 under 35 U.S.C. § 103, the
examiner relies on page 308 of Sedra & Smith as proving that FET 40 is in fact a MOS transistor and states that no
unexpected results would have been attained (Answer, page 7). We note that even when a reference is relied upon
in a minor capacity to support a rejection, "there would appear to be no excuse for not positively including the
reference in the statement of rejection." In re Hoch, 428 F.2d 1341, 1342 n.3, 166 USPQ 406, 407 n.3 (CCPA 1970).
Neither Aoyama et al. nor Sedra & Smith has been positively included in a statement of the rejection, and thus we
find Aoyama et al. and Sedra & Smith not to be relied upon in the rejection of claims 1 to 53.
3We note that the Reply Brief of May 3, 1996, has been entered and considered by the examiner as per the
letter from the examiner of June 4, 1996.
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