Appeal No.1996-3237
Application 08/266,431
from the examiner’s rejection of claims 6-9, which constitute
all the
claims remaining in the application. An amendment after final
rejection was filed on March 18, 1996 and has been entered by
the examiner.
The disclosed invention pertains to a method and
apparatus for observing the condition of an integrated circuit
chip in real-time. A plurality of scannable registers are
provided to indicate the states of various points in the chip.
The scannable registers are monitored at two different points
in time, and the states of these registers at the two points
in time are compared to each other. An error is indicated
when a mis-compare is not detected. Such a condition
indicates that the circuit chip is operating in a stuck
condition.
Representative claim 6 is reproduced as follows:
6. An observable logic circuit formed on an integrated
circuit chip, comprising:
internal logic circuitry operating to produce a
plurality of data signals;
a number of scannable registers coupled to receive
2
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