Appeal No. 1996-3391 Page 2
Application No. 08/160,573
The invention is directed to a data processing apparatus
having an arithmetic logic unit (ALU) with three separate
multibit digital inputs. The ALU performs mixed arithmetic and
Boolean operations on the three inputs, wherein at least one of
the mixed arithmetic and Boolean combinations performs a
Boolean function prior to an arithmetic function. A shifter is
connected to one of the three inputs for shifting the digital
signal received at that input. A mask generator is also
provided which generates a multibit digital mask signal as one
of the three inputs to the ALU. A function control input to
the ALU determines which operations will be performed on the
three multibit digital inputs received by the ALU.
Representative independent claim 1 is reproduced as
follows:
1. A data processing apparatus comprising:
an arithmetic logic unit having first, second and third
data inputs for multibit digital signals representing
corresponding first, second and third input signals, and a
function control input signal for receiving a function signal,
said arithmetic logic unit generating at an output a multibit
digital signal representing a mixed arithmetic and Boolean
combination of said first, second and third inputs
corresponding to said function signal, said mixed arithmetic
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