Appeal No. 96-3513
Application No. 08/220,772
The appellant's invention relates to an output-processing
circuit using at least one latch and at least one adder
circuit to produce neural network outputs. Claim 1 is
illustrative of the claimed invention, and it reads as
follows:
1. A processing circuit for processing the
output of an artificial neuron, said neuron
generating a sequence of outputs, said processing
circuit being coupled to said neuron outputs and to
an output gating function, said processing circuit
comprising:
a latch responsive to one of said neuron outputs
and to said output gating function, said latch
generating an output representative of said neuron
output or zero, depending upon the value of said
output gating function; and
an adder circuit for generating an output, said
adder circuit being responsive to said latch output
and to its own output.
The prior art reference of record relied upon by the
examiner in rejecting the appealed claims is:
Krutz et al. (Krutz) 3,707,621 Dec. 26, 1972
Claims 1 through 11, 13 through 15, and 17 through 21
stand rejected under 35 U.S.C. § 103 as being unpatentable
over Krutz.
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