Appeal No. 1996-3591
Application No. 08/251,053
language of Appellants’ claim 8, we find Masaki’s teaching of
a voltage divider to be cumulative to that of Iyengar which
clearly illustrates a voltage divider 118, 120 in the
multiplier circuit of Figure 7. Further, after considering
the Examiner’s analysis (Answer, page 5) of the limitations of
Appellants’ claim 8, it is our view that all of the claimed
elements exist in the multiplier circuit illustrated in Figure
7 of Iyengar. The claimed comparator is illustrated at 94 of
Iyengar’s Figure 7 and is shown coupled to a stabilizing
feedback circuit with the voltage at node 108 equaling the
voltage at line MVA (Iyengar, col. 17, lines 48-53). The
voltage divider 118, 120 of Iyengar in turn operates to reduce
the multiplied voltage dependent on the values of resistors
118 and 120 as described at column 16, lines 38-42. Further,
we agree with the Examiner’s analysis (Answer, page 6) that
Iyengar’s P-channel transistors 110 and 112 and voltage
divider resistors 118 and 120 meet all of the requirements of
dependent claims 9-14. Accordingly, all of the elements of
claims 8-14 have been shown to be fully disclosed by Iyengar.
A disclosure that anticipates under 35 U.S.C. § 102 also
renders the claim unpatentable under 35 U.S.C. § 103, for
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