Ex parte NAKAMURA - Page 2




          Appeal No. 96-4081                                                          
          Application 08/417,333                                                      



                    This is a decision on appeal from the final rejec-                
          tion of claims 1 through 11.  Claims 12 through 18 have been                
          withdrawn from consideration.                                               
                    The invention is directed to a semiconductor memory               
          device and a manufacturing method thereof.  In particular,                  
          Appellants disclose on page 1 of the specification that the                 
          invention is directed to a semiconductor memory device and                  
          manufacturing method thereof in which a single memory cell                  
          consists of a single field effect transistor.                               
                    Independent claim 1 is reproduced as follows:                     
                    1.  A semiconductor memory device in which a single               
          memory cell consists of a single field effect transistor,                   
          wherein                                                                     
                    said field effect transistor has its source terminal              
          connected to a source wiring having at a portion thereof a                  
          resistor with a high resistance.                                            
                    The Examiner does not rely on any references for the              
          rejection.                                                                  
                    The specification is objected to under 35 U.S.C.                  
          § 112, first paragraph, as failing to provide an adequate                   
          written description of the invention.  Claims 1 through 11                  



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