Appeal No. 1997-0274
Application No. 08/266,912
two prior art references. Appellants argue that “[n]one of the specifics of applicants’
claims 1-5 are mentioned in the Ito patent.” (See brief at page 9.) We disagree with
appellants. Ito teaches a voltage regulation circuit for use with an integrated circuit.
The voltage regulator has a charge pump circuit, 2, having high and low levels on a lead,
for alternately storing charge to pumping or boosting capacitors ‘C’ (See Ito at Figure 1
and col. 2-3) and transferring the stored charge to a load (EPROM or EEPROM). (See Ito
at col. 5-6.) Ito also discloses an enable terminal for receiving an input signal having
negative and positive going transitions and an output terminal for V . Appellants argue
out
that Ito does not teach or suggest having a clock doubling circuit which detects a signal
transition and generates a full cycle signal having high and low levels for each positive and
each negative transition. (See brief at page 9.) We agree with appellants. The Examiner
relies upon the teachings of Tatsumi to teach the transition detection and providing a full
cycle for each of the positive and negative transitions. (See answer at page 4.)
Appellants argue that Tatsumi “fails to disclose the first signal-transition-detection circuit . .
. for producing and applying to the lead of a charge pumping circuit a full -cycle signal.”
(See brief at page 9.) While we agree with appellants that Tatsumi does not provide a full
cycle to the input terminal of a charge
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